FPGA-Based IMU Emulator
on Speedgoat
Implemented an FPGA-based IMU emulator on Speedgoat using MATLAB/Simulink and HDL Coder, generating a 2400 Hz SDLC-framed bitstream for avionics integration testing. The output matches the flight computer's expected IMU interface.
- MATLAB/Simulink to FPGA: Translated IMU behavior from a Simulink model into deterministic FPGA logic using HDL Coder.
- Flight-computer interface fidelity: Produced the 2400 Hz SDLC-framed sensor stream expected by the avionics software.
- Real-time HWIL target: Deployed on Speedgoat as a deterministic real-time target for avionics integration testing.